The present disclosure generally relates to an active vision system, and more specifically, to dynamically re-configurable CMOS imagers used in such a system.
Active vision systems are of interest in realizing autonomous systems. These systems range from commercial and industrial applications to surveillance and military applications. The commercial and industrial applications may involve mobile robots, unmanned vehicles including self-navigating cars and search-and rescue vehicles, automatic assembly and product inspection systems. The surveillance and military applications may involve smart weapons and missile defense systems. Active vision systems are also of interest in space applications involving vehicles for space transportation that require autonomous docking and rendezvous with space stations, robotic exploration of planets, and autonomous rovers. However, an active vision system may involve high degree of complexity because it concurrently carries out a number of diverse visual tasks. These visual tasks may include search, detection, recognition, and unresolved multi-target tracking, which may not be easily handled by conventional imaging systems. Search requires wide field-of-view (FOV), tracking requires fast frame rate data output from regions of interest (ROI), recognition requires high spatial resolution, while multi-target cueing requires all three of them concurrently. Furthermore, many active vision applications involve scenes with low contrast, requiring high imaging quality.
For a conventional imaging system, the visual acquisition power is given by:visual acq. power=FOV×SR×FR=N2*FR,                 where SR is the spatial resolution, FOV is the field of view, N2 is the number of pixels in the imager, and FR is the frame rate. For a large FOV system having 1 million pixels, operating with an update rate of 1 kHz digitized to 10 bits will require a data output rate at a prohibitively high 10 Gigabits per second. The serial nature of the data output from the imager and the nature of sampling of the scene impose unacceptable limitations on power, speed, and volume of the imaging system. Moreover, data processing complexity grows as O(n), where n is the number of pixels output to the off-chip processor. Therefore, the elimination of data-redundancy is critical for realization of real-time active vision systems.        
For such imaging systems, the serial nature of pixel access and the enormity of the data volume impose the greatest bottleneck in coupling an imager to an off-chip processor. Furthermore, most of the power dissipation of an imager is concentrated in the output stage that requires high-speed drive into a large load.
Biological systems, such as a human vision system, achieve real-time imaging through the use of foveated architectures that allow significant data reduction. Foveal vision allows acquisition of images with varying spatial resolution that is coarser at the periphery and more refined at the center (the fovea). However, since the acuity variation is hard-wired, the vision system requires mechanical pointing. Imagers with the pixel sizes scaled and organized in a foveal topology have been demonstrated. Although such imagers do provide some data reduction, pixels may be accessed only in a serial manner. Moreover, the size, power consumption, and the slow response times of mechanical pointing systems preclude an efficient realization of a low-power, miniature, real-time active vision system.